1. Field of the Invention
The present invention relates to a configuration information writing apparatus, configuration information writing method and a computer program product, which compress the total amount of information to be written into a logic circuit device to change the logical configuration thereof.
2. Description of the Related Art
FPGA (Field Programmable Gate Array) is known as a logic circuit device having a function of changing a logical configuration (being reconfigurable). Some FPGAs achieve a fast input/output operation by compressing data using run length encoding (see, for example, Unexamined Japanese Patent Application KOKAI Publication No. 2003-347927).
There is a technique which compresses information by omitting information on a repetitive part included in configuration information (frame) (see, for example, Unexamined Japanese Patent Application KOKAI Publication No. 2001-28536 (FIG. 2)). The partial omission of the configuration information provides the compression of the total amount of the information to be written.